Design of Low-Power Coarse-Grained Reconfigurable Architectures

Coarse-grained reconfigurable architecture has emerged as a solution for flexible, application-specific optimization of embedded systems. Helping you understand the issues involved in designing and constructing embedded systems, this book offers new frameworks for optimizing the architecture of components in embedded systems in order to decrease area and save power. Real application benchmarks and gate-level simulations substantiate these frameworks. The first half of the text explains how to reduce power in the configuration cache. The second half focuses on the design of a cost-effective processing element array to reduce area and power consumption.